1) Field of the Invention
The present invention relates to a signal regeneration device, an optical receiver, and a signal processing method suitably used for receiving a differential phase-shift keying modulated optical signal.
2) Description of the Related Art
Recently, there has been growing demand for introduction of a 40 Gbit/s optical transmission system as the next generation optical transmission system. Moreover, a transmission distance and a spectral efficiency, which are equal to those of a 10 Gbit/s system, are sought. Brisk research and development is being carried out, as means for achieving the transmission distance and the spectral efficiency, in relation to an RZ-DPSK (Differential Phase-Shift Keying) or a CSRZ-DPSK modulation scheme, which is superior to an NRZ (Non-Return to Zero) modulation scheme used in a conventional system of 10 Gb/s or less in terms of optical-signal-to-noise (OSNR) tolerance and non-linear tolerance.
Moreover, in addition to research and development on the above-described modulation scheme, brisk research and development is also being carried out in relation to a phase modulation scheme, such as an RZ-DQPSK or CSRZ-DQPSK (Differential Quadrature Phase-Shift Keying) modulation scheme having a feature of narrow spectrum (high-spectral efficiency). FIG. 7 is a comparative chart showing general characteristics of a duo-binary modulation scheme and a CS-RZ modulation scheme, along with the above-described NRZ modulation scheme, the RZ-DPSK modulation scheme, and the RZ-DQPSK modulation scheme.
FIG. 8 is a block diagram showing an example configuration of an optical transponder system 100A which transmits and receives an optical signal by adoption of a 40 Gb/s RZ-DPSK or CSRZ-DPSK modulation scheme. The optical transponder system 100A shown in FIG. 8 has an optical transmitter 110 for transmitting an optical signal in accordance with the RZ-DPSK modulation scheme or the CSRZ-DPSK modulation scheme, and an optical receiver 120 for performing receiving operation, such as demodulation of an optical signal transmitted from the optical transmitter 110. When an optical signal is transmitted or received in accordance with the RZ-DPSK or CSRZ-DPSK modulation-and-demodulation scheme, intensity of the optical signal is modulated by a 40-GHz clock waveform, and data are superimposed on a binary optical phase.
Here, the optical transmitter 110 shown in FIG. 8 comprises a transmission data processing section 111, a CW (Continuous Wave) light source 112, a phase modulator 113, and an RZ pulse generation intensity modulator 114. The transmission data processing section 111 performs a function as a framer for generating, e.g., an OTN (Optical Transport Network) frame from input data and another function as an FEC (Forward Error Correction) encoder for imparting an error correction code. Further, the transmission data processing section 111 performs a function as a DPSK precoder for effecting encoding operation which is reflected to a difference between a code of a current bit and a code of a one-bit-preceding bit.
The phase modulator 113 modulates continuous wave light output from the CW light source 112 by use of encoded data from the transmission data processing section 111, and outputs an optical signal whose light intensity is constant but carries data in the binary optical phase; namely, a DPSK modulated optical signal. Moreover, the RZ pulse generation intensity modulator 114 forms an RZ pulse from the optical signal output from the phase modulator 113. Especially, an optical signal converted into an RZ pulse through use of a clock drive signal, whose frequency is the same (40 GHz) as that of a bit rate and which has an amplitude that is substantially an extinction voltage (Vπ), is called an RZ-DPSK signal. An optical signal converted into an RZ pulse through use of a clock drive signal, whose frequency (20 GHz) is half that of the bit rate and which has an amplitude that is substantially double the amplitude of the extinction voltage (Vπ), is called a CSRZ-DPSK signal (A1, A2 shown in FIG. 8).
The optical receiver 120 is connected to the optical transmitter 110 by way of a transmission path 101, and receives the (CS)RZ-DPSK signal to thus process the received signal. The optical receiver 120 comprises a delay interferometer 121, a photoelectric conversion section 122, a regeneration circuit 123, and a received data processing section 124.
The delay interferometer 121 is formed from, e.g., a Mach-Zehnder interferometer, and causes interference (delayed interference) between an one-bit-delayed (CS)RZ-DPSK signal—and the (CS)RZ-DPSK signal whose phase is controlled to 0 rad, thereby producing the result of interference as two outputs. Specifically, one of branch waveguides forming the Mach-Zehnder interferometer is formed so as to become longer than the other branch waveguide by a propagation length corresponding to a period of one bit, and the other branch has an electrode 121a used for subjecting an optical signal, which propagates through the other branch waveguide, to phase control.
The photoelectric conversion section 122 is formed from a dual pin photodiode which receives two optical outputs from the above delay interferometer 121, to thus perform differential photoelectric conversion detection (balanced detection). The received signal detected by the photoelectric conversion section 122 is converted from an electrical current signal into a voltage signal by means of a transimpedance amplifier 122c. The regeneration circuit (a 40 Gb/s CDR: Clock Data Recovery) 123 receives an input of a received signal detected by the photoelectric conversion section 122 by means of differential photoelectric conversion, byway of the transimpedance amplifier (TIA) 122c, and regenerates a data signal and extracts a clock signal. On the basis of the data signal and the clock signal, which have been regenerated and extracted by the regeneration circuit 123, the received data processing section 124 performs processing of an OTN framer or processing of a signal, such as error correction involving FEC decoding.
FIG. 9 is a block diagram showing an optical transponder system 100B which transmits or receives an optical signal by adoption of the 40 Gb/s RZ-DQPSK or CSRZ-DQPSK modulation scheme. This optical transponder system 100B comprises an optical transmitter 130 for transmitting an optical signal modulated by the RZ-DQPSK or CSRZ-DQPSK modulation scheme, and an optical receiver 140 for receiving the optical signal transmitted from the optical transmitter 130.
When the optical signal is transmitted or received by the RZ-DQPSK or CSRZ-DQPSK modulation-and-demodulation scheme, intensity of the optical signal is modulated by a 20 GHz clock waveform, and data are superposed on a quadrature optical phase. General descriptions of a configuration for transmitting or receiving data by means of the above-described RZ-DQPSK or CSRZ-DQPSK modulation-and-demodulation will be provided hereunder. However, details about the configuration are described in, e.g., JP-T-2004-516743.
The optical transmitter 130 shown in FIG. 9 comprises a transmission data processing section 131, a CW (Continuous Wave) light source 133, a π/2 phase shifter 134, two phase modulators 135-1, 135-2, and an RZ pulse generation intensity modulator 136.
As in the case of the transmission data processing section 111 shown in FIG. 8, the transmission data processing section 131 performs functions as the OTN framer and the FEC encoder. Further, the transmission data processing section 131 performs a function as a DQPSK precoder for encoding operation which is reflected to a difference between a one-bit-preceding code and a current code. This transmission data processing section 131 outputs two lines of 20 Gbit/s encoded data (data #1, data #2).
The CW light source 133 outputs continuous wave light, and the continuous wave light output from the CW light source 133 is branched. One of the branched light beams is input to the phase modulator 135-1, and the remaining light beam enters the phase modulator 135-2 by way of the π/2 phase shifter 134. The phase modulator 135-1 modulates the continuous wave light output from the CW light source 133 by utilization of the encoded data (data#1) of one channel separated by a 1:2 separation section 132, thereby outputting an optical signal in which data are superposed on a binary optical phase (0rad or πrad).
Moreover, the light, which is formed as a result of the continuous wave light from the CW light source 133 having under gone π/2 phase shifting effected by the π/2 phase shifter 134, is input to the phase modulator 135-2. This continuous wave light is modulated by the encoded data (data #2) of the other line separated by the 1:2 separation section 132, to thus output an optical signal in which data are superposed on a binary optical phase (π/2 rad or 3π/2 rad).
The modulated light beams output from the phase modulators 135-1, 135-2 are merged together and output to the RZ pulse generation intensity modulator 136 provided in a subsequent stage. Specifically, as a result of the modulated light beams output from the phase modulators 135-1, 135-2 being merged together, an optical signal in which data are superposed on a quadrature optical phase having constant light intensity; namely, the DQPSK modulated optical signal, can be output.
As in the case of the RZ pulse generation intensity modulator indicated by reference numeral 114 in FIG. 8, the RZ pulse generation intensity modulator 136 converts into an RZ pulse the optical signal into which the modulated light beams from the phase modulators 135-1, 135-2 are merged. Particularly, an optical signal, which has been converted into an RZ pulse through use of a clock drive signal whose frequency (20 GHz) is identical with a bit rate and whose amplitude is equal to the amplitude of the extinction voltage (Vπ), is referred to as an RZ-DQPSK signal. Further, an optical signal, which has been converted into an RZ pulse by use of a clock drive signal whose frequency (10 GHz) is half the bit rate and whose amplitude is double that of the extinction voltage (Vπ), is referred to as a CSRZ-DQPSK signal.
Moreover, the optical receiver 140 is connected to the optical transmitter 130 by way of the transmission path 101, and subjects the (CS) RZ-DQPSK signal from the optical transmitter 130 to received signal processing. In addition to including an optical signal branch section 146 for branching the received optical signal, the optical receiver 140 has delay interferometers 141-1, 141-2, photoelectric conversion sections 142-1, 142-2, regeneration circuits (20 Gb/s CDR) 143-1, 143-2, and a received data processing section 145.
Two signals into which the (CS)RZ-DQPSK signal transmitted through the transmission path 101 is branched are input to the delay interferometers 141-1, 141-2, respectively. The delay interferometer 141-1 subjects a (CS)RZ-DQPSK signal delayed for a period of one bit and a (CS)RZ-DQPSK signal having undergone π/4 rad phase control to interference (delayed interference), and a result of interference is generated as two outputs. Alternatively, the delay interferometer 141-2 subjects a (CS)RZ-DQPSK signal delayed for a period of one bit and a (CS)RZ-DQPSK signal having undergone −π/4 rad phase control (shifted from that of the delay interferometer 141-1 by π/2) to interference (delayed interference), and a result of interference is generated as two outputs.
Each of the delay interferometers 141-1, 141-2 is also formed from a Mach-Zehnder interferometer. One of branch waveguides, which constitute each Mach-Zehnder interferometer, is formed so as to become longer than the other branch waveguide by a propagation length corresponding to a period of one bit. The delay interferometers 141-1, 141-2 have respective electrodes 141a, 141b for controlling the phase of an optical signal which propagates through the other branch waveguide.
The photoelectric conversion section 142-1 is formed from a dual-pin photodiode which performs differential photoelectric conversion detection by means of receiving two output light beams from the delay interferometer 141-1. Likewise, the photoelectric conversion section 142-2 is formed from a dual-pin photodiode which performs differential photoelectric conversion detection by means of receiving two light beams output from the delay interferometer 141-2. The received signal, which has been detected by the photoelectric conversion sections 142-1, 142-2, is converted from an electric current signal into a voltage signal by means of a transimpedance amplifier 142e. 
The regeneration circuit 143-1 regenerates, from an electrical signal corresponding to the intensity of an optical signal received by the photoelectric conversion section 142-1, an I (In-phase) signal of the clock and the data. The regeneration circuit 143-2 regenerates a Q (Quadrature-phase) signal of the clock and the data, from the optical signal received by the photoelectric conversion section 142-2.
The received data processing section 145 performs a function as an OTN framer and a function of effecting error correction by means of FEC decoding operation, on the basis of the clock signal and the data signal regenerated by the regeneration circuits 143-1, 143-2.
As mentioned above, according to the (CS)RZ-D(Q)PSK modulation-and-demodulation scheme, in order to convert a phase modulation signal into an intensity modulation signal and identify the signal by the optical receivers 120, 140, the delay interferometers 121, 141-1, and 141-2 impart a delay difference corresponding to a duration of one bit to thus cause optical interference.
Incidentally, each of the regeneration circuit 123 of the optical receiver 120 shown in FIG. 8 and the regeneration circuits 143-1, 143-2 of the optical receiver 140 shown in FIG. 9 can be configured from a clock recovery circuit (CR) 151 and a D flip-flop 152, as shown in FIG. 10. The clock recovery circuit 151 extracts a clock signal from an electrical signal which has been received by the photoelectric conversion section and has intensity variations corresponding to the code of the data. The D flip-flop 152 takes as a data input the electrical signal received by the photoelectric conversion section; takes as a clock input a clock signal recovered by the clock recovery circuit 151; and outputs regenerated data.
The clock recovery circuit 151 is constituted of a PLL (Phase-locked Loop) circuit formed from, e.g., a phase comparator 151a, a loop filter 151b, and a voltage controlled oscillator (VCO) 151c. 
Particularly, the phase comparator 151a outputs a signal corresponding to a phase difference or frequency difference between the clock signal output from the VCO 151c and the electrical signal output from the photoelectric conversion section. FIGS. 2 and 3 of a related art document; i.e., J. D. H. Alexander “Clock Recovery from Random Binary Data,” Electronics Letters, vol. 11, pp. 541-542, October 1975, show the phase comparator 151a constituting the clock recovery circuit 151.
For instance, as shown in FIG. 11, an equalizing filter 153 and a limiting amplifier (LIA) 154 are interposed between the transimpedance amplifier 142e and the regeneration circuit 143-1 (143-2) of the optical receiver 140 shown in FIG. 9. The equalizing filter 153 subjects an output from the transimpedance amplifier 142e to waveform shaping, and the limiting amplifier 154 normalizes the amplitude of an output from the equalizing filter 153. The optical receiver 120 shown in FIG. 8 can also be equipped with the equalizing filter 153 and the limiting amplifier 154, which are analogous to those mentioned previously. As a result of interposition of the equalizing filter 153 such as that shown in FIG. 11, the waveform of a received signal is known to be shaped to thereby broaden an eye opening, thereby enhancing receiving sensitivity.
Techniques described in the following patent documents are available as known techniques relevant to the present invention.
(Patent Document 1) JP-A-2005-260696
(Patent Document 2) JP-A-2003-87201
(Patent Document 3) JP-A-2005-252369
However, since the waveform of the received signal, which is detected by photoelectric conversion, assumes the waveform shape of the RZ signal, the optical receivers 120, 140 shown in FIGS. 8 and 9 are hindered from making the accuracy of a clock signal extracted by the clock recovery circuit 151 highly precise. Even when the equalizing filter 153 shown in FIG. 11 is interposed, as shown in FIG. 3B, the waveform of the received signal assumes a waveform such as that of the RZ signal; and hence the same problem can be said to arise.
More specifically, the waveform of an electrical signal output from the transimpedance amplifier 122c forming the optical receiver 120 or from the transimpedance amplifier 142e forming the optical receiver 140 does not exhibit a constant amplitude when changes in the code remain constant from 0 to 0 or from 1 to 1, but assumes the shape of a waveform such as that of the RZ signal. Therefore, when a change has arisen in a code, difficulty is encountered in detecting the edge, which in turn poses difficulty in enhancing the accuracy of a clock signal to be detected. In this case, even when the eye opening has been broadened by the equalizing filter 153, the accuracy of the clock signals recovered by the recovery circuit 123, 143-1, and 143-2 cannot be enhanced to a great extent.
The reason for this can be said to be that the clock recovery circuit 151, such as that conventionally adopted and shown in FIG. 10, is usually provided with the phase comparator 115a, such as that described in the previously-described documents, and is designed on the premise that the format of a signal input for extracting a clock signal is an NRZ signal. In short, with a view toward enhancing the accuracy of a detected clock signal, the conventional clock recovery circuit 151 is required to prevent occurrence of changes in amplitude, which would otherwise be caused when changes in the code remain constant from 0 to 0 or from 1 to 1.
The electrical signals output from the transimpedance amplifiers 122c, 142e can also be conceived to assume a signal waveform whose property is to assume a constant waveform when changes in the code remain constant from 0 to 0 or from 1 to 1. In order to maintain superior receiving sensitivity, a wide eye opening, such as that shown in FIG. 3B, must be sustained.
The related-art technology, including the techniques described in Patent Documents 1 to 3, fails to provide any technique for enhancing the accuracy of a clock signal to be extracted while maintaining such superior receiving sensitivity.